In digital systems information is represented by patterns of “symbols,” much as words are represented by patterns of letters. Binary systems represent information using just two symbols to alternatively represent a logical one or a logical zero. In a common example, a relatively high voltage state may represent a one symbol and a relatively low voltage state a zero symbol. A series of symbols can thus be communicated as a voltage signal that alternates between low and high values in a manner that reflects the series. For example, a digital transmitter can convey a series of symbols over a channel by sequentially injecting high and low voltage levels as necessary to replicate the series. The time each voltage level is held on the channel to represent a symbol is termed the “symbol time,” and the speed with which symbols can be communicated the “symbol rate.” A digital receiver can then recover each symbol by comparing the voltage for each symbol time against a reference voltage to distinguish between high and low voltages.
High performance communication channels suffer from many effects that degrade symbols, and consequently render them difficult to resolve. Primary among them are frequency dependent channel loss (dispersion) and reflections from impedance discontinuities. Both of these effects cause neighboring symbols to interfere with one another, and are commonly referred to collectively as inter-symbol interference (ISI). For example, neighboring relatively high-voltage symbols may spread out to raise the level of neighboring low-voltage symbols; if the resulting voltage distortion is sufficiently high, the low-voltage symbols may be interpreted incorrectly. Lower-voltage symbols may likewise induce errors in neighboring higher-voltage symbols.
ISI becomes more pronounced at higher signaling rates, ultimately degrading signal quality such that distinctions between originally transmitted symbols may be lost. Some receivers therefore mitigate the effects of ISI using one or more equalizers, and thus increase the available symbol rate. One common type of equalizer used for this purpose, the decision-feedback equalizer (DFE), corrects for ISI by multiplying recently received symbols by respective tap coefficients and either subtracting the resultant products from the received signal or adding the resultant products to the reference against which the symbol is interpreted. If a recently received symbol of a relatively high voltage is known to increase the level of a current symbol by a given amount, for example, then that same amount can be subtracted from the incoming voltage or added to the reference to correct for the distortion. The same principle can be extended to multiple preceding symbols.
In very high-speed systems it can be difficult to resolve recently received symbols in time to calculate their impact on incoming symbols. Some receivers therefore ignore the impact of recent symbols on the incoming signal, and consequently fail to correct for the ISI attributed to those symbols. Other receivers employ partial-response DFEs (PrDFEs) that obtain multiple samples of the incoming data using multiple correction coefficients, one for each of the possible values of the most recently received symbol or symbols. The correct sample is then selected after the most recently received symbol or symbols are resolved. For example, if it is not yet known whether a preceding symbol was of a relatively high or low voltage, and therefore whether to reduce or raise the voltage level of the current symbol to correct for ISI, then two forms of the current symbol are adjusted and sampled, one for each possibility. The correct one of the two samples is then selected after the preceding symbol is resolved.
PrDFEs are effective, but require a separate subtraction and sampling path for each possible value of the most recently received symbol or, in the case of multiple symbols (multi-symbol PrDFE), a separate computational path for each possible combination of the multiple symbol values. This results in e.g. 2^N sampling paths in a binary PrDFE system that considers N prior symbols. The complexity and power usage thus grows exponentially with the number of prior symbols being considered.